引用本文:李星辰,赵斐然,孟庆辉,游科友.面向FPGA便捷部署的智能模型预测控制[J].控制理论与应用,2023,40(9):1519~1528.[点击复制]
LI Xingchen,ZHAO Feiran,MENG Qinghui,YOU Keyou.Intelligent model predictive control with efficient FPGA implementation[J].Control Theory and Technology,2023,40(9):1519~1528.[点击复制]
面向FPGA便捷部署的智能模型预测控制
Intelligent model predictive control with efficient FPGA implementation
摘要点击 1732  全文点击 509  投稿时间：2022-05-01  修订日期：2023-07-17
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DOI编号  10.7641/CTA.2022.20336
  2023,40(9):1519-1528
中文关键词  FPGA  模型预测控制  神经网络
英文关键词  FPGA  model predictive control  neural network
基金项目  科技创新2030–“新一代人工智能”重大项目(2022ZD0116700), 国家自然科学基金重点项目(62033006), 清华大学国强研究院项目
作者单位E-mail
李星辰 清华大学 自动化系 lixc21@mails.tsinghua.edu.cn 
赵斐然 清华大学 自动化系  
孟庆辉 潍柴动力股份有限公司  
游科友* 清华大学 自动化系 youky@tsinghua.edu.cn 
中文摘要
      现场可编程逻辑门阵列(FPGA)具有可编程、易并行化的独特优势, 是实现一体化感知、决策、控制最具前景的人工智能芯片之一, 但其硬件描述语言(HDL)不易掌握. 本文提出了一种基于神经网络的智能MPC及其FPGA便捷部署方法, 使用高层次综合(HLS)生成HDL代码, 并通过MATLAB-Modelsim联合仿真验证代码功能, 可克服人工编写HDL代码的困难, 提高控制算法的部署效率. 该方法利用了深度神经网络的结构特点和FPGA的并行计算优势, 离线训练神经网络在线仅需硬件化正向传播, 在低资源占用的同时具有严格计算时间保证. 将所提方法分别应用于高速、高维控制系统中, FPGA在环测试验证了其有效性.
英文摘要
      The field programmable gate array (FPGA) is one of the most promising artificial intelligence chips with unique advantages in programmability and parallelization to realize integrated perception, decision and control algorithms. However, the hardware description language (HDL) of FPGA is hard to manually write. This paper presents a convenient deployment method of intelligent MPC and FPGA based on the neural networks to overcome the difficulty of manually writing HDL code and improve the deployment efficiency of control algorithm, which generates the HDL code by highlevel synthesis (HLS) and verifies the function of HDL code by the MATLAB-Modelsim co-simulation. This method takes advantage of the structural characteristics of deep neural networks and the parallel computing advantages of FPGA. A neural network is trained offline, and only the forward propagation on FPGA is required online, so a strict calculation time guarantee with low resource occupation is realized. The proposed method is applied to high-speed and high-dimensional control systems. The effectiveness of the method is verified by the FPGA-in-the-loop experiment.